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"A 2GHz Digital PLL, with temperature lock range of -40°C to ..."

Biman Chattopadhyay et al. (2011)

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DOI: 10.1109/CICC.2011.6055413

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Biman Chattopadhyay, Anant S. Kamath, Satyasai Evani, Karthik Subburaj:
A 2GHz Digital PLL, with temperature lock range of -40°C to 125°C, in 45nm CMOS. CICC 2011: 1-4

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