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ORCID"A 6 MHz-130 MHz DLL with a fixed latency of one clock cycle delay."
Hsiang-Hui Chang, Jyh-Woei Lin, Shen-Iuan Liu (2002)
- Hsiang-Hui Chang, Jyh-Woei Lin, Shen-Iuan Liu:
A 6 MHz-130 MHz DLL with a fixed latency of one clock cycle delay. CICC 2002: 49-52
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