"An Optimized S-Box Circuit Architecture for Low Power AES Design."

Sumio Morioka, Akashi Satoh (2002)

Details and statistics

DOI: 10.1007/3-540-36400-5_14

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-02

a service of  Schloss Dagstuhl - Leibniz Center for Informatics