"Pipeline Scheduling with Dual Voltages for Low Power Design."

Chaeseok Lim, Jong Tae Kim (2007)

> Home

Details and statistics

DOI: —

access: unavailable

type: Conference or Workshop Paper

metadata version: 2009-03-08

- no documents available
- export record
  dblp key:
  - conf/cdes/LimK07
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/cdes/LimK07
Chaeseok Lim, Jong Tae Kim:
Pipeline Scheduling with Dual Voltages for Low Power Design. CDES 2007: 100-104

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.