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"Test Pattern Generation Method for VHDL Descriptions with BFS-DEVS Simulator."
François Giamarchi et al. (2007)
- François Giamarchi, Laurent Capocchi, Dominique Federici, Paul Bisgambiglia:
Test Pattern Generation Method for VHDL Descriptions with BFS-DEVS Simulator. CDES 2007: 78-83
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