BibTeX record conf/async/FuggerKLW18

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@inproceedings{DBLP:conf/async/FuggerKLW18,
  author    = {Matthias F{\"{u}}gger and
               Attila Kinali and
               Christoph Lenzen and
               Ben Wiederhake},
  title     = {Fast All-Digital Clock Frequency Adaptation Circuit for Voltage Droop
               Tolerance},
  booktitle = {24th {IEEE} International Symposium on Asynchronous Circuits and Systems,
               {ASYNC} 2018, Vienna, Austria, May 13-16, 2018},
  pages     = {68--77},
  year      = {2018},
  crossref  = {DBLP:conf/async/2018},
  url       = {https://doi.org/10.1109/ASYNC.2018.00025},
  doi       = {10.1109/ASYNC.2018.00025},
  timestamp = {Sun, 25 Oct 2020 22:57:30 +0100},
  biburl    = {https://dblp.org/rec/conf/async/FuggerKLW18.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/async/2018,
  title     = {24th {IEEE} International Symposium on Asynchronous Circuits and Systems,
               {ASYNC} 2018, Vienna, Austria, May 13-16, 2018},
  publisher = {{IEEE} Computer Society},
  year      = {2018},
  url       = {https://ieeexplore.ieee.org/xpl/conhome/8588203/proceeding},
  isbn      = {978-1-5386-5883-3},
  timestamp = {Sun, 28 Nov 2021 22:35:12 +0100},
  biburl    = {https://dblp.org/rec/conf/async/2018.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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