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"A dynamic power reduction in synchronous 2RW 8T dual-port SRAM by ..."

Yoshisato Yokoyama et al. (2017)

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DOI: 10.1109/ASSCC.2017.8240204

access: closed

type: Conference or Workshop Paper

metadata version: 2018-01-05

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  dblp key:
  - conf/asscc/YokoyamaION17
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  - https://dblp.org/rec/conf/asscc/YokoyamaION17
Yoshisato Yokoyama, Yuichiro Ishii, Haruyuki Okuda, Koji Nii:
A dynamic power reduction in synchronous 2RW 8T dual-port SRAM by adjusting wordline pulse timing with same/different row access mode. A-SSCC 2017: 13-16

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