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"A 12.75-to-16-GHz Spur-Jitter-Joint-Optimization SS-PLL Achieving ..."

Yixi Li et al. (2023)

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DOI: 10.1109/A-SSCC58667.2023.10347983

access: closed

type: Conference or Workshop Paper

metadata version: 2024-01-27

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Yixi Li, Zhao Zhang, Yong Chen, Xinyu Shen, Zhao Zhang, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu:
A 12.75-to-16-GHz Spur-Jitter-Joint-Optimization SS-PLL Achieving -94.55-dBc Reference Spur, 31.9-fs Integrated Jitter and -260.1-dB FoM. A-SSCC 2023: 1-3

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