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"1.55mW 2GHz ERBW 7b 800MS/s 3-stage Pipelined SAR ADC in 28nm CMOS using a ..."

Hyeonsik Kim, Seonkyung Kim, Jintae Kim (2021)

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DOI: 10.1109/A-SSCC53895.2021.9634748

access: closed

type: Conference or Workshop Paper

metadata version: 2023-05-01

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Hyeonsik Kim, Seonkyung Kim, Jintae Kim:
1.55mW 2GHz ERBW 7b 800MS/s 3-stage Pipelined SAR ADC in 28nm CMOS using a Kickback-Cancelling 7T-Dynamic Residue Amplifier with only 16fF Input Capacitance. A-SSCC 2021: 1-3

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