"A 64-Kb 0.37V 28nm 10T-SRAM with mixed-Vth read-port and boosted WL scheme ..."

Hidehiro Fujiwara et al. (2016)

Details and statistics

DOI: 10.1109/ASSCC.2016.7844166

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

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