"A Sort-Less FPGA-Based Non-Maximum Suppression Accelerator using ..."

Chaoming Fang et al. (2021)

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DOI: 10.1109/A-SSCC53895.2021.9634708

access: closed

type: Conference or Workshop Paper

metadata version: 2021-12-21

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  dblp key:
  - conf/asscc/FangDSYSL21
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  - https://dblp.org/rec/conf/asscc/FangDSYSL21
Chaoming Fang, Habib Derbyshire, Wenyu Sun, Jinshan Yue, Haobing Shi, Yongpan Liu:
A Sort-Less FPGA-Based Non-Maximum Suppression Accelerator using Multi-Thread Computing and Binary Max Engine for Object Detection. A-SSCC 2021: 1-3

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