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ORCID"Power analysis and implementation of a low-power 300 MHz 8-b × 8-b ..."
Jinn-Shyan Wang, Po-Hui Yang (2000)
- Jinn-Shyan Wang, Po-Hui Yang:
Power analysis and implementation of a low-power 300 MHz 8-b × 8-b pipelined multiplier. ASP-DAC 2000: 225-228
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