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"Performance and reliability driven clock scheduling of sequential logic ..."

Atsushi Takahashi, Yoji Kajitani (1997)

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DOI: 10.1109/ASPDAC.1997.600055

access: closed

type: Conference or Workshop Paper

metadata version: 2023-05-01

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Atsushi Takahashi, Yoji Kajitani:
Performance and reliability driven clock scheduling of sequential logic circuits. ASP-DAC 1997: 37-42

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