![](https://dblp.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
default search action
"VLSI implementation of rake receiver for IS-95 CDMA Testbed using FPGA."
Oliver Yuk-Hang Leung, Chi-Ying Tsui, Roger S. Cheng (2000)
- Oliver Yuk-Hang Leung, Chi-Ying Tsui
, Roger S. Cheng
:
VLSI implementation of rake receiver for IS-95 CDMA Testbed using FPGA. ASP-DAC 2000: 3-4
![](https://dblp.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.