"Block-level 3D IC design with through-silicon-via planning."

Dae Hyun Kim, Rasit Onur Topaloglu, Sung Kyu Lim (2012)

Details and statistics

DOI: 10.1109/ASPDAC.2012.6164969

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-02

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