"Coupling reverse engineering and SAT to tackle NP-complete arithmetic ..."

Yi Diao et al. (2016)

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DOI: 10.1109/ASPDAC.2016.7428002

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Yi Diao, Xing Wei, Tak-Kei Lam, Yu-Liang Wu:
Coupling reverse engineering and SAT to tackle NP-complete arithmetic circuitry verification in ∼O(# of gates). ASP-DAC 2016: 139-146

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