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"A 7.9-fJ/conversion-step 8-b 400-MS/s 2-b-per-cycle SAR ADC with A preset ..."

Jixuan Xiang et al. (2013)

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DOI: 10.1109/ASICON.2013.6812049

access: closed

type: Conference or Workshop Paper

metadata version: 2017-11-28

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  dblp key:
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Jixuan Xiang, Jian Mei, Hao Chang, Fan Ye:
A 7.9-fJ/conversion-step 8-b 400-MS/s 2-b-per-cycle SAR ADC with A preset capacitive DAC. ASICON 2013: 1-4

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