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"A Vernier Time-to-Digital Converter with 1.5ps Resolution for an ..."

Peifang Wu et al. (2023)

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DOI: 10.1109/ASICON58565.2023.10396616

access: closed

type: Conference or Workshop Paper

metadata version: 2024-02-16

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  dblp key:
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Peifang Wu, Yan Liu, Xi Feng, Hao Xu, Na Yan:
A Vernier Time-to-Digital Converter with 1.5ps Resolution for an All-Digital Phase Locked Loop in 28nm CMOS. ASICON 2023: 1-4

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