"A multi-FPGA application-specific architecture for accelerating a floating ..."

Jason Lee et al. (2008)

> Home

Details and statistics

DOI: 10.1109/ASAP.2008.4580178

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

- view
  authority control:
- export record
  dblp key:
  - conf/asap/LeeSYM08
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/asap/LeeSYM08
Jason Lee, Lesley Shannon, Matthew J. Yedlin, Gary F. Margrave:
A multi-FPGA application-specific architecture for accelerating a floating point Fourier Integral Operator. ASAP 2008: 197-202

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.