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"High Performance UDP/IP 40Gb Ethernet Stack for FPGAs."

Milind Parelkar, Darshan Jetly (2018)

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DOI: 10.1007/978-3-319-78890-6_21

access: closed

type: Conference or Workshop Paper

metadata version: 2018-04-26

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Milind Parelkar, Darshan Jetly:
High Performance UDP/IP 40Gb Ethernet Stack for FPGAs. ARC 2018: 255-268

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