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"A Zero-Gating Processing Element Design for Low-Power Deep Convolutional ..."

Lin Ye et al. (2019)

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DOI: 10.1109/APCCAS47518.2019.8953157

access: closed

type: Conference or Workshop Paper

metadata version: 2020-06-15

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  dblp key:
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  - https://dblp.org/rec/conf/apccas/YeYYS19
Lin Ye, Jinghao Ye, Masao Yanagisawa, Youhua Shi:
A Zero-Gating Processing Element Design for Low-Power Deep Convolutional Neural Networks. APCCAS 2019: 317-320

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