Stop the war!
Остановите войну!
for scientists:
default search action
"A Novel Hardware Architecture for Low Power and Rapid Testing of VLSI ..."
Jiann-Chyi Rau, Po-Han Wu, Chia-Jung Liu (2006)
- Jiann-Chyi Rau, Po-Han Wu, Chia-Jung Liu:
A Novel Hardware Architecture for Low Power and Rapid Testing of VLSI Circuits. APCCAS 2006: 1883-1886
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.