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"Stacked Active Loads For Low Power, High Speed GaAs Digital Circuits (SALFL)."
A. K. Mrunal, M. A. Shirasgaonkar, Rajendra M. Patrikar (2006)
- A. K. Mrunal, M. A. Shirasgaonkar, Rajendra M. Patrikar:
Stacked Active Loads For Low Power, High Speed GaAs Digital Circuits (SALFL). APCCAS 2006: 1488-1491
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