"Utilizing register transfer level false paths for circuit optimization ..."

Tsuyoshi Iwagaki et al. (2012)

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DOI: 10.1109/APCCAS.2012.6419110

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Tsuyoshi Iwagaki, Takehiro Mikami, Hideyuki Ichihara, Tomoo Inoue:
Utilizing register transfer level false paths for circuit optimization with a logic synthesis tool. APCCAS 2012: 615-618

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