BibTeX record journals/tvlsi/YinZLW16

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@article{DBLP:journals/tvlsi/YinZLW16,
  author    = {Shouyi Yin and
               Pengcheng Zhou and
               Leibo Liu and
               Shaojun Wei},
  title     = {Trigger-Centric Loop Mapping on CGRAs},
  journal   = {{IEEE} Trans. {VLSI} Syst.},
  volume    = {24},
  number    = {5},
  pages     = {1998--2002},
  year      = {2016},
  url       = {https://doi.org/10.1109/TVLSI.2015.2486781},
  doi       = {10.1109/TVLSI.2015.2486781},
  timestamp = {Thu, 18 May 2017 09:50:48 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/tvlsi/YinZLW16},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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