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BibTeX record journals/tvlsi/LeeJ14
@article{DBLP:journals/tvlsi/LeeJ14, author = {Chun{-}Yi Lee and Niraj K. Jha}, title = {FinCANON: {A} PVT-Aware Integrated Delay and Power Modeling Framework for FinFET-Based Caches and On-Chip Networks}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {22}, number = {5}, pages = {1150--1163}, year = {2014}, url = {https://doi.org/10.1109/TVLSI.2013.2260569}, doi = {10.1109/TVLSI.2013.2260569}, timestamp = {Thu, 14 Oct 2021 09:21:31 +0200}, biburl = {https://dblp.org/rec/journals/tvlsi/LeeJ14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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