BibTeX record journals/tvlsi/KuangWL16

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@article{DBLP:journals/tvlsi/KuangWL16,
  author       = {Shiann{-}Rong Kuang and
                  Kun{-}Yi Wu and
                  Ren{-}Yao Lu},
  title        = {Low-Cost High-Performance {VLSI} Architecture for Montgomery Modular
                  Multiplication},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {24},
  number       = {2},
  pages        = {434--443},
  year         = {2016},
  url          = {https://doi.org/10.1109/TVLSI.2015.2409113},
  doi          = {10.1109/TVLSI.2015.2409113},
  timestamp    = {Wed, 11 Mar 2020 18:18:04 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/KuangWL16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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