BibTeX record journals/jbcs/MeloSSLMM15

download as .bib file

@article{DBLP:journals/jbcs/MeloSSLMM15,
  author       = {Lucas T. Melo and
                  S. H. C. Santana and
                  Abel G. Silva{-}Filho and
                  Manoel Eus{\'{e}}bio de Lima and
                  Victor Wanderley Costa de Medeiros and
                  Marcelo L. M. Marinho},
  title        = {An inter-FPGA communication bus with error detection and dynamic clock
                  phase adjustment},
  journal      = {J. Braz. Comput. Soc.},
  volume       = {21},
  number       = {1},
  pages        = {12:1--12:11},
  year         = {2015},
  url          = {https://doi.org/10.1186/s13173-015-0026-z},
  doi          = {10.1186/S13173-015-0026-Z},
  timestamp    = {Mon, 04 Mar 2024 11:30:41 +0100},
  biburl       = {https://dblp.org/rec/journals/jbcs/MeloSSLMM15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.