BibTeX record journals/cee/MohantyGK14

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@article{DBLP:journals/cee/MohantyGK14,
  author       = {Saraju P. Mohanty and
                  Mahadevan Gomathisankaran and
                  Elias Kougianos},
  title        = {Variability-aware architecture level optimization techniques for robust
                  nanoscale chip design},
  journal      = {Comput. Electr. Eng.},
  volume       = {40},
  number       = {1},
  pages        = {168--193},
  year         = {2014},
  url          = {https://doi.org/10.1016/j.compeleceng.2013.11.026},
  doi          = {10.1016/J.COMPELECENG.2013.11.026},
  timestamp    = {Wed, 19 Feb 2020 15:33:44 +0100},
  biburl       = {https://dblp.org/rec/journals/cee/MohantyGK14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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