BibTeX record conf/vlsid/SomasekharV93

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@inproceedings{DBLP:conf/vlsid/SomasekharV93,
  author       = {Dinesh Somasekhar and
                  V. Visvanathan},
  title        = {A 230MHz Half Bit Level Pipelined Multiplier Using True Single Phase
                  Clocking},
  booktitle    = {Proceedings of the Sixth International Conference on {VLSI} Design,
                  {VLSI} Design 1993, Bombay, India, January 3-6, 1993},
  pages        = {347--350},
  publisher    = {{IEEE} Computer Society},
  year         = {1993},
  url          = {https://doi.org/10.1109/ICVD.1993.669708},
  doi          = {10.1109/ICVD.1993.669708},
  timestamp    = {Fri, 24 Mar 2023 00:03:59 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/SomasekharV93.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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