BibTeX record conf/vlsid/DrechslerFK06

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@inproceedings{DBLP:conf/vlsid/DrechslerFK06,
  author       = {Rolf Drechsler and
                  G{\"{o}}rschwin Fey and
                  Sebastian Kinder},
  title        = {An Integrated Approach for Combining {BDD} and {SAT} Provers},
  booktitle    = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
                  3-7 January 2006, Hyderabad, India},
  pages        = {237--242},
  publisher    = {{IEEE} Computer Society},
  year         = {2006},
  url          = {https://doi.org/10.1109/VLSID.2006.44},
  doi          = {10.1109/VLSID.2006.44},
  timestamp    = {Fri, 24 Mar 2023 00:04:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/DrechslerFK06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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