BibTeX record conf/vlsid/ChandyB96

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@inproceedings{DBLP:conf/vlsid/ChandyB96,
  author    = {John A. Chandy and
               Prithviraj Banerjee},
  title     = {Parallel simulated annealing strategies for {VLSI} cell placement},
  booktitle = {9th International Conference on {VLSI} Design {(VLSI} Design 1996),
               3-6 January 1996, Bangalore, India},
  pages     = {37--42},
  year      = {1996},
  crossref  = {DBLP:conf/vlsid/1996},
  url       = {https://doi.org/10.1109/ICVD.1996.489451},
  doi       = {10.1109/ICVD.1996.489451},
  timestamp = {Tue, 23 May 2017 01:13:10 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/vlsid/ChandyB96},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vlsid/1996,
  title     = {9th International Conference on {VLSI} Design {(VLSI} Design 1996),
               3-6 January 1996, Bangalore, India},
  publisher = {{IEEE} Computer Society},
  year      = {1996},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=3519},
  isbn      = {0-8186-7228-5},
  timestamp = {Mon, 20 Apr 2015 18:26:33 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/vlsid/1996},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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