BibTeX record conf/vlsic/ZhengFAARCM18

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@inproceedings{DBLP:conf/vlsic/ZhengFAARCM18,
  author       = {Kevin Zheng and
                  Yohan Frans and
                  Sai Lalith Ambatipudi and
                  Santiago Asuncion and
                  Hari Teja Reddy and
                  Ken Chang and
                  Boris Murmann},
  title        = {An Inverter-Based Analog Front End for a 56 {GB/S} {PAM4} Wireline
                  Transceiver in 16NMCMOS},
  booktitle    = {2018 {IEEE} Symposium on {VLSI} Circuits, Honolulu, HI, USA, June
                  18-22, 2018},
  pages        = {269--270},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/VLSIC.2018.8502377},
  doi          = {10.1109/VLSIC.2018.8502377},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsic/ZhengFAARCM18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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