BibTeX record conf/vlsic/ZhangLLSKZ19

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@inproceedings{DBLP:conf/vlsic/ZhangLLSKZ19,
  author       = {Jie{-}Fang Zhang and
                  Ching{-}En Lee and
                  Chester Liu and
                  Yakun Sophia Shao and
                  Stephen W. Keckler and
                  Zhengya Zhang},
  title        = {{SNAP:} {A} 1.67 - 21.55TOPS/W Sparse Neural Acceleration Processor
                  for Unstructured Sparse Deep Neural Network Inference in 16nm {CMOS}},
  booktitle    = {2019 Symposium on {VLSI} Circuits, Kyoto, Japan, June 9-14, 2019},
  pages        = {306},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.23919/VLSIC.2019.8778193},
  doi          = {10.23919/VLSIC.2019.8778193},
  timestamp    = {Wed, 07 Dec 2022 23:09:32 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsic/ZhangLLSKZ19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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