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BibTeX record conf/vlsi/SudhakarKS07
@inproceedings{DBLP:conf/vlsi/SudhakarKS07, author = {M. Sudhakar and Ramachandruni Venkata Kamala and M. B. Srinivas}, title = {A bit-sliced, scalable and unified montgomery multiplier architecture for {RSA} and {ECC}}, booktitle = {{IFIP} VLSI-SoC 2007, {IFIP} {WG} 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Atlanta, GA, USA, 15-17 October 2007}, pages = {252--257}, publisher = {{IEEE}}, year = {2007}, url = {https://doi.org/10.1109/VLSISOC.2007.4402507}, doi = {10.1109/VLSISOC.2007.4402507}, timestamp = {Wed, 24 May 2017 08:29:32 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/SudhakarKS07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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