BibTeX record conf/sips/EmreYSCC12

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@inproceedings{DBLP:conf/sips/EmreYSCC12,
  author       = {Yunus Emre and
                  Chengen Yang and
                  Ketul Sutaria and
                  Yu Cao and
                  Chaitali Chakrabarti},
  title        = {Enhancing the Reliability of {STT-RAM} through Circuit and System
                  Level Techniques},
  booktitle    = {2012 {IEEE} Workshop on Signal Processing Systems, Quebec City, QC,
                  Canada, October 17-19, 2012},
  pages        = {125--130},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/SiPS.2012.11},
  doi          = {10.1109/SIPS.2012.11},
  timestamp    = {Fri, 09 Apr 2021 18:46:16 +0200},
  biburl       = {https://dblp.org/rec/conf/sips/EmreYSCC12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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