BibTeX record conf/isscc/WhatmoughLLRBW17

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@inproceedings{DBLP:conf/isscc/WhatmoughLLRBW17,
  author    = {Paul N. Whatmough and
               Sae Kyu Lee and
               Hyunkwang Lee and
               Saketh Rama and
               David M. Brooks and
               Gu{-}Yeon Wei},
  title     = {14.3 {A} 28nm SoC with a 1.2GHz 568nJ/prediction sparse deep-neural-network
               engine with {\textgreater}0.1 timing error rate tolerance for IoT
               applications},
  booktitle = {2017 {IEEE} International Solid-State Circuits Conference, {ISSCC}
               2017, San Francisco, CA, USA, February 5-9, 2017},
  pages     = {242--243},
  year      = {2017},
  crossref  = {DBLP:conf/isscc/2017},
  url       = {https://doi.org/10.1109/ISSCC.2017.7870351},
  doi       = {10.1109/ISSCC.2017.7870351},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isscc/WhatmoughLLRBW17},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isscc/2017,
  title     = {2017 {IEEE} International Solid-State Circuits Conference, {ISSCC}
               2017, San Francisco, CA, USA, February 5-9, 2017},
  publisher = {{IEEE}},
  year      = {2017},
  url       = {https://ieeexplore.ieee.org/xpl/conhome/7866667/proceeding},
  isbn      = {978-1-5090-3758-2},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isscc/2017},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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