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BibTeX record conf/isscc/SiTHSLWLWLCZSWL20
@inproceedings{DBLP:conf/isscc/SiTHSLWLWLCZSWL20, author = {Xin Si and Yung{-}Ning Tu and Wei{-}Hsing Huang and Jian{-}Wei Su and Pei{-}Jung Lu and Jing{-}Hong Wang and Ta{-}Wei Liu and Ssu{-}Yen Wu and Ruhui Liu and Yen{-}Chi Chou and Zhixiao Zhang and Syuan{-}Hao Sie and Wei{-}Chen Wei and Yun{-}Chen Lo and Tai{-}Hsing Wen and Tzu{-}Hsiang Hsu and Yen{-}Kai Chen and William Shih and Chung{-}Chuan Lo and Ren{-}Shuo Liu and Chih{-}Cheng Hsieh and Kea{-}Tiong Tang and Nan{-}Chun Lien and Wei{-}Chiang Shih and Yajuan He and Qiang Li and Meng{-}Fan Chang}, title = {15.5 {A} 28nm 64Kb 6T {SRAM} Computing-in-Memory Macro with 8b {MAC} Operation for {AI} Edge Chips}, booktitle = {2020 {IEEE} International Solid- State Circuits Conference, {ISSCC} 2020, San Francisco, CA, USA, February 16-20, 2020}, pages = {246--248}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/ISSCC19947.2020.9062995}, doi = {10.1109/ISSCC19947.2020.9062995}, timestamp = {Tue, 07 May 2024 20:09:09 +0200}, biburl = {https://dblp.org/rec/conf/isscc/SiTHSLWLWLCZSWL20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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