BibTeX record conf/isscc/ChangLPJHWLLKKKBNKKCYK09

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@inproceedings{DBLP:conf/isscc/ChangLPJHWLLKKKBNKKCYK09,
  author       = {Seung{-}Ho Chang and
                  Sok{-}Kyu Lee and
                  Seong{-}Je Park and
                  Min{-}Joong Jung and
                  Jung{-}Chul Han and
                  In{-}Soo Wang and
                  Kyu{-}Hee Lim and
                  Jung{-}Hwan Lee and
                  Ji{-}Hwan Kim and
                  Won{-}Kyung Kang and
                  Tai{-}Kyu Kang and
                  Hee{-}Su Byun and
                  Yujong Noh and
                  Lee{-}Hyun Kwon and
                  Bon{-}Kwang Koo and
                  Myung Cho and
                  Joong{-}Seob Yang and
                  Yo{-}Hwan Koh},
  title        = {A 48nm 32Gb 8-level {NAND} flash memory with 5.5MB/s program throughput},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2009,
                  Digest of Technical Papers, San Francisco, CA, USA, 8-12 February,
                  2009},
  pages        = {240--241},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/ISSCC.2009.4977397},
  doi          = {10.1109/ISSCC.2009.4977397},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/ChangLPJHWLLKKKBNKKCYK09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}