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BibTeX record conf/isscc/AhmadUISASCF16
@inproceedings{DBLP:conf/isscc/AhmadUISASCF16, author = {Fazil Ahmad and Greg Unruh and Amrutha Iyer and Pin{-}En Su and Sherif Abdalla and Bo Shen and Mark Chambers and Ichiro Fujimori}, title = {19.1 {A} 0.5-to-9.5GHz 1.2{\(\mathrm{\mu}\)}s-lock-time fractional-N {DPLL} with {\(\pm\)}1.25{\%} {UI} period jitter in 16nm {CMOS} for dynamic frequency and core-count scaling in SoC}, booktitle = {2016 {IEEE} International Solid-State Circuits Conference, {ISSCC} 2016, San Francisco, CA, USA, January 31 - February 4, 2016}, pages = {324--325}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/ISSCC.2016.7418038}, doi = {10.1109/ISSCC.2016.7418038}, timestamp = {Wed, 16 Oct 2019 14:14:55 +0200}, biburl = {https://dblp.org/rec/conf/isscc/AhmadUISASCF16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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