BibTeX record conf/islped/HirakiBKGNSSS96

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@inproceedings{DBLP:conf/islped/HirakiBKGNSSS96,
  author       = {Mitsuru Hiraki and
                  Raminder Singh Bajwa and
                  Hirotsugu Kojima and
                  Douglas J. Gorny and
                  Ken{-}ichi Nitta and
                  Avadhani Shridhar and
                  Katsuro Sasaki and
                  Koichi Seki},
  editor       = {Mark Horowitz and
                  Jan M. Rabaey and
                  Brock Barton and
                  Massoud Pedram},
  title        = {Stage-skip pipeline: a low power processor architecture using a decoded
                  instruction buffer},
  booktitle    = {Proceedings of the 1996 International Symposium on Low Power Electronics
                  and Design, 1996, Monterey, California, USA, August 12-14, 1996},
  pages        = {353--358},
  publisher    = {{IEEE}},
  year         = {1996},
  url          = {https://doi.org/10.1109/LPE.1996.547538},
  doi          = {10.1109/LPE.1996.547538},
  timestamp    = {Mon, 09 Aug 2021 14:54:04 +0200},
  biburl       = {https://dblp.org/rec/conf/islped/HirakiBKGNSSS96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}