BibTeX record conf/iscas/DimitrakopoulosVNE03

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@inproceedings{DBLP:conf/iscas/DimitrakopoulosVNE03,
  author       = {Giorgos Dimitrakopoulos and
                  Haridimos T. Vergos and
                  Dimitris Nikolos and
                  Costas Efstathiou},
  title        = {A systematic methodology for designing area-time efficient parallel-prefix
                  modulo 2\({}^{\mbox{n}}\) - 1 adders},
  booktitle    = {Proceedings of the 2003 International Symposium on Circuits and Systems,
                  {ISCAS} 2003, Bangkok, Thailand, May 25-28, 2003},
  pages        = {225--228},
  publisher    = {{IEEE}},
  year         = {2003},
  url          = {https://doi.org/10.1109/ISCAS.2003.1206237},
  doi          = {10.1109/ISCAS.2003.1206237},
  timestamp    = {Wed, 28 Jul 2021 14:18:34 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/DimitrakopoulosVNE03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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