BibTeX record conf/iscas/ChiangHCL05

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@inproceedings{DBLP:conf/iscas/ChiangHCL05,
  author       = {Jen{-}Shiun Chiang and
                  Chih{-}Hsien Hsia and
                  Hsin{-}Jung Chen and
                  Te{-}Jung Lo},
  title        = {{VLSI} architecture of low memory and high speed 2D lifting-based
                  discrete wavelet transform for {JPEG2000} applications},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
                  May 2005, Kobe, Japan},
  pages        = {4554--4557},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ISCAS.2005.1465645},
  doi          = {10.1109/ISCAS.2005.1465645},
  timestamp    = {Tue, 21 Mar 2023 20:52:43 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/ChiangHCL05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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