BibTeX record conf/isca/YanLHL10

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@inproceedings{DBLP:conf/isca/YanLHL10,
  author    = {Guihai Yan and
               Xiaoyao Liang and
               Yinhe Han and
               Xiaowei Li},
  title     = {Leveraging the core-level complementary effects of {PVT} variations
               to reduce timing emergencies in multi-core processors},
  booktitle = {37th International Symposium on Computer Architecture {(ISCA} 2010),
               June 19-23, 2010, Saint-Malo, France},
  pages     = {485--496},
  year      = {2010},
  crossref  = {DBLP:conf/isca/2010},
  url       = {https://doi.org/10.1145/1815961.1816025},
  doi       = {10.1145/1815961.1816025},
  timestamp = {Tue, 06 Nov 2018 11:07:01 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/isca/YanLHL10},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isca/2010,
  editor    = {Andr{\'{e}} Seznec and
               Uri C. Weiser and
               Ronny Ronen},
  title     = {37th International Symposium on Computer Architecture {(ISCA} 2010),
               June 19-23, 2010, Saint-Malo, France},
  publisher = {{ACM}},
  year      = {2010},
  url       = {http://dl.acm.org/citation.cfm?id=1815961},
  isbn      = {978-1-4503-0053-7},
  timestamp = {Thu, 16 Oct 2014 17:35:16 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isca/2010},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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