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BibTeX record conf/icecsys/CetinkayaZGKK18
@inproceedings{DBLP:conf/icecsys/CetinkayaZGKK18, author = {Hakan {\c{C}}etinkaya and Ali Zeki and Alper Girgin and Enver Derun Karabeyoglu and Tufan Coskun Karalar}, title = {A 1.6 GHz Non-overlap Clock Generation with Differential Clock Driver and Clock Level Shifters for GS/s Sampling Rate Pipeline ADCs}, booktitle = {25th {IEEE} International Conference on Electronics, Circuits and Systems, {ICECS} 2018, Bordeaux, France, December 9-12, 2018}, pages = {277--280}, publisher = {{IEEE}}, year = {2018}, url = {https://doi.org/10.1109/ICECS.2018.8618005}, doi = {10.1109/ICECS.2018.8618005}, timestamp = {Fri, 19 Jan 2024 08:33:23 +0100}, biburl = {https://dblp.org/rec/conf/icecsys/CetinkayaZGKK18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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