BibTeX record conf/hpca/JaleelJ05

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@inproceedings{DBLP:conf/hpca/JaleelJ05,
  author    = {Aamer Jaleel and
               Bruce L. Jacob},
  title     = {Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects
               of Reordered Memory Instructions},
  booktitle = {11th International Conference on High-Performance Computer Architecture
               {(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
  pages     = {191--200},
  year      = {2005},
  crossref  = {DBLP:conf/hpca/2005},
  url       = {https://doi.org/10.1109/HPCA.2005.42},
  doi       = {10.1109/HPCA.2005.42},
  timestamp = {Fri, 19 May 2017 01:26:32 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/JaleelJ05},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hpca/2005,
  title     = {11th International Conference on High-Performance Computer Architecture
               {(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
  publisher = {{IEEE} Computer Society},
  year      = {2005},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=9519},
  isbn      = {0-7695-2275-0},
  timestamp = {Tue, 07 Oct 2014 17:26:20 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/2005},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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