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BibTeX record conf/glvlsi/NiuZYCYS11
@inproceedings{DBLP:conf/glvlsi/NiuZYCYS11, author = {Feifei Niu and Qiang Zhou and Hailong Yao and Yici Cai and Jianlei Yang and Chin Ngai Sze}, editor = {David Atienza and Yuan Xie and Jos{\'{e}} L. Ayala and Ken S. Stevens}, title = {Obstacle-avoiding and slew-constrained buffered clock tree synthesis for skew optimization}, booktitle = {Proceedings of the 21st {ACM} Great Lakes Symposium on {VLSI} 2010, Lausanne, Switzerland, May 2-6, 2011}, pages = {199--204}, publisher = {{ACM}}, year = {2011}, url = {https://doi.org/10.1145/1973009.1973049}, doi = {10.1145/1973009.1973049}, timestamp = {Sun, 05 Apr 2020 17:23:36 +0200}, biburl = {https://dblp.org/rec/conf/glvlsi/NiuZYCYS11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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