BibTeX record conf/globalsip/MeiLNJZW17

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@inproceedings{DBLP:conf/globalsip/MeiLNJZW17,
  author       = {Chunsheng Mei and
                  Zhenyu Liu and
                  Yue Niu and
                  Xiangyang Ji and
                  Wei Zhou and
                  Dongsheng Wang},
  title        = {A 200MHZ 202.4GFLOPS@10.8W {VGG16} accelerator in Xilinx {VX690T}},
  booktitle    = {2017 {IEEE} Global Conference on Signal and Information Processing,
                  GlobalSIP 2017, Montreal, QC, Canada, November 14-16, 2017},
  pages        = {784--788},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/GlobalSIP.2017.8309067},
  doi          = {10.1109/GLOBALSIP.2017.8309067},
  timestamp    = {Wed, 01 Sep 2021 17:26:23 +0200},
  biburl       = {https://dblp.org/rec/conf/globalsip/MeiLNJZW17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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