BibTeX record conf/fmcad/LutebergetCJ18

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@inproceedings{DBLP:conf/fmcad/LutebergetCJ18,
  author       = {Bj{\o}rnar Luteberget and
                  Koen Claessen and
                  Christian Johansen},
  editor       = {Nikolaj S. Bj{\o}rner and
                  Arie Gurfinkel},
  title        = {Design-Time Railway Capacity Verification using {SAT} modulo Discrete
                  Event Simulation},
  booktitle    = {2018 Formal Methods in Computer Aided Design, {FMCAD} 2018, Austin,
                  TX, USA, October 30 - November 2, 2018},
  pages        = {1--9},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.23919/FMCAD.2018.8603003},
  doi          = {10.23919/FMCAD.2018.8603003},
  timestamp    = {Sat, 30 Sep 2023 09:41:20 +0200},
  biburl       = {https://dblp.org/rec/conf/fmcad/LutebergetCJ18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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