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BibTeX record conf/ecctd/YadavDPS13
@inproceedings{DBLP:conf/ecctd/YadavDPS13, author = {Nandakishor Yadav and Sunil Dutt and Manisha Pattanaik and G. K. Sharma}, title = {Double-gate FinFET process variation aware 10T {SRAM} cell topology design and analysis}, booktitle = {21st European Conference on Circuit Theory and Design, {ECCTD} 2013, Dresden, Germany, September 8-12, 2013}, pages = {1--4}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/ECCTD.2013.6662215}, doi = {10.1109/ECCTD.2013.6662215}, timestamp = {Mon, 09 Aug 2021 01:32:18 +0200}, biburl = {https://dblp.org/rec/conf/ecctd/YadavDPS13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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